By finding out the common modulo 2 additions within groups of Galois field ( GF) multipliers and pre-computing the common items, the GOA can reduce the number of XOR gates efficiently and thus reduce the circuit area. 通过查找钱氏搜索电路中GF(Galoisfield)常数乘法器的公共模2加运算并进行预运算,GOA能够有效地减少电路中异或门的数量,从而减少电路面积。
A Basic Building Cell of Dual-Rail XOR Circuit and Its Application in VLSI Circuit Design 一种双线异或组成单元及其在VLSI电路设计中的应用
Low Power Technology for Static Logic Circuit Based on XOR Gate 基于XOR门的静态逻辑电路功耗优化技术
Based on polarity conversion, an optimal XOR gate decomposition for static logic circuit is designed in order to minimize the power dissipation. 通过极性转换,可迅速得到基于XOR门的静态逻辑电路的最优结构,达到优化功耗的目的。